Architecture of MPEG-2 digital set-top-box for CATV VOD system

Author

Kohiyama, Kiyoshi ; Shirai, Hideaki ; Ogawa, Kiyotaka ; Manakata, Akio ; Koga, Yuzuru ; Ishizaki, Masayuki

Author_Institution

Fujitsu Labs. Ltd., Tokyo, Japan

Volume

42

Issue

3

fYear

1996

fDate

8/1/1996 12:00:00 AM

Firstpage

667

Lastpage

672

Abstract

We describe an MPEG-2 compliant VOD (video on demand) terminal (e.g. set-top-box) developed for field trial purposes. The hardware architecture of the set-top-box is discussed with emphasis on the graphics system which integrates the MPEG-2 format video, computer graphics and NTSC analog format video. A key point in the implementation of this architecture is the development of a clock rate conversion circuit. The set-top-box contains a one-chip MPEG-2 decoder

Keywords

cable television; code standards; computer graphics; decoding; digital signal processing chips; digital television; interactive television; interactive video; telecommunication standards; television standards; video coding; CATV VOD system; MPEG-2 digital set-top-box; MPEG-2 format video; NTSC analog format video; clock rate conversion circuit; computer graphics; field trial; graphics system; hardware architecture; one-chip MPEG-2 decoder; video on demand; Bandwidth; Computer architecture; Computer graphics; Decoding; Signal processing; Streaming media; TV; Telephony; Transform coding; Video on demand;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.536170

Filename

536170