DocumentCode
1367231
Title
A four-quadrant subthreshold mode multiplier for analog neural-network applications
Author
Coué, Dominique ; Wilson, George
Author_Institution
Sch. of Electron. Commun. & Electr. Eng., Plymouth Univ., UK
Volume
7
Issue
5
fYear
1996
fDate
9/1/1996 12:00:00 AM
Firstpage
1212
Lastpage
1219
Abstract
A new four-quadrant CMOS analog multiplier is presented, based on devices operating in the subthreshold mode of conduction. The proposed circuit is a cross-coupled quad structure in which differential multiplication is obtained by driving the gate and bulk (back gate) terminals of the devices. Analysis and simulation have shown that the new structure has the characteristics required for the design of very large scale integration (VLSI) analog neural networks. Although operating at subthreshold current levels, reasonable speed can be obtained since voltage swings are in the range of a few Vt. The behavior of the basic multiplier has been assessed experimentally using transistor-arrays and simulation studies on a network including 11 neurons and 31 synapses indicate a useful level of functionality
Keywords
CMOS analogue integrated circuits; VLSI; analogue multipliers; circuit analysis computing; feedforward neural nets; integrated circuit design; neural chips; CMOS analog multiplier; VLSI; analog neural-network; bulk terminals; differential multiplication; four-quadrant subthreshold mode; gate terminal; subthreshold current levels; Analytical models; Circuit simulation; Helium; Integrated circuit interconnections; MOSFETs; Neural networks; Neurons; Subthreshold current; Very large scale integration; Voltage;
fLanguage
English
Journal_Title
Neural Networks, IEEE Transactions on
Publisher
ieee
ISSN
1045-9227
Type
jour
DOI
10.1109/72.536315
Filename
536315
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