Control current and relative stability of peak current-mode controlled pulse-width modulated dc-dc converters without slope compensation

General equation for the control current for the inner-current loop of pulse-width modulated (PWM) dc-dc power converters with peak current-mode control without slope compensation is derived. Derivations of expressions for the control current as functions of duty cycle and phase margin at power stage specifications for buck, boost and buck-boost dc-dc converters in continuous conduction mode (CCM) are presented. Relative stability of the inner-current loop without slope compensation was analysed. Experimental and Saber simulation results for a buck converter with the inner-current loop are presented to validate the theory presented. The results obtained can be used to determine the range of control voltage required by the inner loop, to select a proper value of sense resistance, and to design the control circuit in the outer-voltage loop of peak current-mode controlled PWM DC-DC converters. It is shown that the phase margin of the inner loop is 0- at a duty cycle value of 0.5 and increases as the duty cycle decreases.