DocumentCode
1368591
Title
C-element multiplexing for fault-tolerant logic circuits
Author
Winstead, Chris
Author_Institution
Dept. of Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA
Volume
45
Issue
19
fYear
2009
Firstpage
969
Lastpage
970
Abstract
A novel approach to von Neumann multiplexing is considered, in which NAND gates are replaced by Muller C-elements. The new method is developed as an application of maximum a-posteriori (MAP) estimation, and is shown to be superior to NAND multiplexing in systems where transient upsets are the dominant fault species.
Keywords
NAND circuits; algebra; maximum likelihood estimation; multiplying circuits; C-element multiplexing; Muller C-elements; NAND gates; NAND multiplexing; dominant fault species; fault-tolerant logic circuits; maximum a-posteriori estimation; transient upsets; von Neumann multiplexing;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2009.1073
Filename
5238484
Link To Document