DocumentCode :
1369118
Title :
In-line Inspection Impact on Cycle Time and Yield
Author :
Tirkel, Israel ; Reshef, Noam ; Rabinowitz, Gad
Author_Institution :
Dept. of Ind. Eng. & Manage., Ben-Gurion Univ. of the Negev, Beer-Sheba, Israel
Volume :
22
Issue :
4
fYear :
2009
Firstpage :
491
Lastpage :
498
Abstract :
The semiconductor industry constantly drives for high yield and low cycle time (CT), while most current manufacturing practices consider them separately. This research investigates and exhibits the relationship between CT and yield as affected by in-line metrology inspections of production lots. Among the various factors that impact the tradeoff between CT and yield, we focus on single operation monitors and investigate their measure rate and scheduling. The research assumes a simplified production cell consisting of three operation steps that represent a typical segment in a production line. We compose and apply dynamic policies for metrology inspections via simulation and analytical methods. The aim is to concurrently reduce the CT accumulated and increase the yield achieved due to inspections. Ten inspection policies are compared under nine different operation scenarios. The results of most of the policies present a concave curve of yield versus CT. The curve illustrates that growing inspection rate increases both yield and CT until the yield reaches a maximum and then starts to decline. The cause for the yield decline is longer delay in corrective feedback to an out-of-control production tool due to longer waiting time for inspection. A cost-benefit CT-yield objective function is defined and demonstrates that the newly composed dynamic inspection policies are superior to the commonly used fixed measure rate policy. Future research could relax part of the simplified production cell assumptions in order to consider more realistic model structure and scenarios.
Keywords :
cost-benefit analysis; inspection; integrated circuit manufacture; semiconductor industry; analytical methods; cost-benefit CT-yield objective function; dynamic inspection policies; in-line metrology inspections; low cycle time; out-of-control production tool; realistic model structure; scheduling; semiconductor industry; simplified production cell; simulation method; wafer fabrication process; Cycle time; inspections; wafer fabrication; yield;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2009.2031779
Filename :
5238563
Link To Document :
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