Title :
A 550-MSample/s 8-Tap FIR digital filter for magnetic recording read channels
Author :
Staszewski, Robert Bogdan ; Muhammad, Khurram ; Balsara, Poras
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
An area-efficient low-power and low-latency 550-MSample/s FIR filter for magnetic recording read channel applications is presented. A parallel direct type II architecture operates on real-time deinterleaved (even and odd) input data samples and employs a fast low-area multiplier based on selection of radix-8 premultiplied coefficients in conjunction with one-hot encoded bus leading to a very compact layout and reduced power dissipation. The chip has been fabricated using a 0.18-/spl mu/m L-effective CMOS technology and is currently being used in commercial applications.
Keywords :
CMOS digital integrated circuits; FIR filters; digital filters; digital magnetic recording; low-power electronics; multiplying circuits; parallel architectures; 0.18 micron; FIR digital filter; L-effective CMOS technology; area-efficient filter; low-area multiplier; low-latency filter; low-power electronics; magnetic recording read channels; one-hot encoded bus; parallel direct type II architecture; power dissipation; radix-8 premultiplied coefficients; real-time deinterleaved samples; CMOS technology; Circuit synthesis; Delay; Digital filters; Finite impulse response filter; Information retrieval; Magnetic recording; Magnetic separation; Power dissipation; Timing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
