DocumentCode :
1370993
Title :
CNoC: High-Radix Clos Network-on-Chip
Author :
Kao, Yu-Hsiang ; Yang, Ming ; Artan, N. Sertac ; Chao, H. Jonathan
Author_Institution :
Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, OH, USA
Volume :
30
Issue :
12
fYear :
2011
Firstpage :
1897
Lastpage :
1910
Abstract :
Many high-radix network-on-chip (NoC) topologies have been proposed to improve network performance with an ever-growing number of processing elements (PEs) on a chip. We believe high-radix Clos network-on-chip (CNoC) is the most promising with its low average hop counts and good load-balancing characteristics. In this paper, we propose: 1) a high-radix router architecture with virtual output queue (VOQ) buffer structure and packet mode dual round-robin matching (PDRRM) scheduling algorithm to achieve high speed and high throughput in CNoC; 2) the design of hierarchical round-robin arbiter for high-radix high-speed NoC routers; and 3) a heuristic floor-planning algorithm to minimize the power consumption caused by the long wires. Experimental results show that the throughput of a 64-node three-stage CNoC under uniform traffic increases from 62% to 78% by replacing the baseline virtual channel routers with PDRRM VOQ routers. We also compared the delay, power, and area performance of the 64-node CNoC with other NoC topologies under various synthetic traffic patterns and SPLASH-2 benchmark traces. The simulation results show that in general CNoC improves the throughput, low-load delay, and energy efficiency over the compared NoC topologies.
Keywords :
multiprocessor interconnection networks; network topology; network-on-chip; CNoC; high-radix Clos network-on-chip; high-radix network-on-chip topologies; high-radix router architecture; packet mode dual round-robin matching scheduling algorithm; processing elements; virtual output queue buffer structure; Heuristic algorithms; Network topology; Network-on-a-chip; Power demand; Scheduling algorithm; Throughput; Chip multiprocessor; clos network; high-radix NoC; network-on-chip;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2011.2164538
Filename :
6071084
Link To Document :
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