DocumentCode :
1371262
Title :
Petri net models of latch metastability
Author :
Clark, I.G. ; Xia, F. ; Yakovlev, A.V. ; Davies, A.C.
Author_Institution :
Dept. of Electron. & Electr. Eng., King´´s Coll., London, UK
Volume :
34
Issue :
7
fYear :
1998
fDate :
4/2/1998 12:00:00 AM
Firstpage :
635
Lastpage :
636
Abstract :
Data communication between concurrent processes often employs shared latch circuitry which may display metastable transients when the processes are not synchronised. A method of deriving discrete Petri net models for such latches is proposed. The representation includes both the local onset of metastability and the effects of metastable input signals
Keywords :
Petri nets; asynchronous circuits; data communication; flip-flops; transient analysis; asynchronous process; concurrent process; data communication; discrete Petri net model; latch circuit; metastable transient;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19980502
Filename :
673764
Link To Document :
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