Square-rooting and vector summation circuits using current conveyors

Recently, Lui [1995] presented a square-rooting circuit using CCII, MOS transistors and a buffered unity-gain inverting amplifier. It is interesting since it finds various applications as described in his paper. However, an error occurred in the paper. An ambiguity about the polarity of the output will occur in practice. In fact, the racing condition of currents through both MOS transistors will determine the output polarity of the circuit, which is random. It will be troublesome in actual applications and this ambiguity must be eliminated. To overcome this ambiguity, we suggest adding the full wave rectifier to either the output of the buffered inverting amplifier or the z-terminal of the CCII