CMOS compatible electrochemical process for improving quality factor of spiral microinductors

This study presents a post-CMOS electrochemical technique to improve the quality factor of standard CMOS inductors. This technique is a maskless process based on Silox Vapox III which possesses great etching selectivity between aluminium and SiO₂ during electrochemical process. A porous silicon layer was generated on silicon substrate using this technique to increase the effective substrate resistance and to reduce the substrate loss. The result of the experiment showed that quality factor of a 1.5- and a 3.5-turn microinductor has been increased by 72.2 and 47%, respectively. A lumped-element model was used to analyse the effect of the presented technique. This technique provides a low-cost and effective process to modify CMOS components.