Impact of Well Structure on Single-Event Well Potential Modulation in Bulk CMOS

Author

Gaspard, Nelson J. ; Witulski, Arthur F. ; Atkinson, Nicholas M. ; Ahlbin, Jonathan R. ; Holman, W. Timothy ; Bhuva, Bharat L. ; Loveless, T. Daniel ; Massengill, Lloyd W.

Author_Institution

Vanderbilt Univ., Nashville, TN, USA

Volume

58

Issue

6

fYear

2011

Firstpage

2614

Lastpage

2620

Abstract

Perturbations in N-well potential have been shown to strongly affect the charge collection, charge sharing, and parasitic bipolar transistor characteristics. In this paper, temporal and spatial characteristics of the well-potential modulation are characterized through 3-D TCAD simulations. Effects of well-contact layout, ion energy, and technology process parameters for a 90-nm bulk CMOS process are investigated.

Keywords

CMOS integrated circuits; bipolar transistors; semiconductor device models; technology CAD (electronics); 3D TCAD simulations; N-well potential; bulk CMOS process; charge collection; charge sharing; ion energy; parasitic bipolar transistor characteristics; perturbations; single-event well potential modulation; spatial characteristics; technology process parameters; temporal characteristics; well structure; well-contact layout; CMOS integrated circuits; Doping; Electric potential; Junctions; Resistance; Semiconductor device modeling; Transistors; Charge sharing; single event; well potential collapse; well potential modulation;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2011.2171366

Filename

6072292