Title :
Minimum input sensitivity of high-order multi-stage sigma-delta modulator with first-order front-end
Author :
Ong, C.K. ; Siek, L. ; Ng, L.S.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore
fDate :
8/1/2000 12:00:00 AM
Abstract :
Employing multi-stage sigma-delta modulators has provided an effective means of eliminating stability problems while achieving high-resolution analog to-digital conversion. However, component matching has become more stringent than a single stage modulator. Mismatches cause loss in the modulators signal to-noise ratio (SNR), but to a certain class of multi- stage modulators, discontinuity is also apparent in its SNR characteristics. This class of modulators employs a first-order modulator in its first stage. The discontinuity is caused by the nonlinearity of a first-order modulator´s noise, which is related to the minimum input requirement for the first-order modulator. This brief includes the formulation of the first-order modulator´s minimum amplitude, nonlinear characteristics, and its effect on multi-stage modulators
Keywords :
CMOS integrated circuits; cascade networks; circuit stability; integrated circuit noise; sigma-delta modulation; SNR characteristics; component matching; first-order front-end; high-order multi-stage sigma-delta modulator; input sensitivity; minimum input requirement; nonlinear characteristics; signal to-noise ratio; stability problems; Circuits; Delta-sigma modulation; Digital filters; Digital signal processing; Filter bank; Finite impulse response filter; Notice of Violation; Prototypes; Signal processing; Signal to noise ratio;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on