DocumentCode :
1372502
Title :
Memristor Bridge Synapses
Author :
Kim, Hyongsuk ; Sah, Maheshwar Pd ; Yang, Changju ; Roska, Tamás ; Chua, Leon O.
Author_Institution :
Div. of Electron. & Inf. Eng., Chonbuk Nat. Univ., Jeonju, South Korea
Volume :
100
Issue :
6
fYear :
2012
fDate :
6/1/2012 12:00:00 AM
Firstpage :
2061
Lastpage :
2070
Abstract :
In this paper, we propose a memristor bridge circuit consisting of four identical memristors that is able to perform zero, negative, and positive synaptic weightings. Together with three additional transistors, the memristor bridge weighting circuit is able to perform synaptic operation for neural cells. It is compact as both weighting and weight programming are performed in a memristor bridge synapse. It is power efficient, since the operation is based on pulsed input signals. Its input terminals are utilized commonly for applying both weight programming and weight processing signals via time sharing. In this paper, features of the memristor bridge synapses are investigated using the TiO memristor model via simulations.
Keywords :
bridge circuits; memristors; transistors; TiO2; bridge weighting circuit; memristor bridge circuit; memristor bridge synapses; negative synaptic weightings; neural cells; positive synaptic weightings; pulsed input signals; time sharing; transistors; weight processing signals; weight programming; zero synaptic weightings; Bridge circuits; Integrated circuit modeling; Memristors; Neural networks; Nonvolatile memory; Resistance; Transistors; Voltage control; Memristor bridge synapse; neural networks; non-volatile memory; synaptic weight; voltage divider;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/JPROC.2011.2166749
Filename :
6074916
Link To Document :
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