DocumentCode :
137322
Title :
Bootstrap circuit with high-voltage charge storing for area efficient gate drivers in power management systems
Author :
Seidel, Achim ; Costa, Maice ; Joos, Joachim ; Wicht, Baptiste
Author_Institution :
Robert Bosch Center for Power Electron., Reutlingen Univ., Reutlingen, Germany
fYear :
2014
fDate :
22-26 Sept. 2014
Firstpage :
159
Lastpage :
162
Abstract :
Bootstrap circuits are mainly used for supplying a gate driver circuit to provide the gate overdrive voltage for a high-side NMOS transistor. The required charge has to be provided by a bootstrap capacitor which is often too large for integration if an acceptable voltage dip at the capacitor has to be guaranteed. Three options of an area efficient bootstrap circuit for a high side driver with an output stage of two NMOS transistors are proposed. The key idea is that the main bootstrap capacitor is supported by a second bootstrap capacitor, which is charged to a higher voltage and connected when the gate driver turns on. A high voltage swing at the second capacitor leads to a high charge allocation. Both bootstrap capacitors require up to 70% less area compared to a conventional bootstrap circuit. This enables compact power management systems with fewer discrete components and smaller die size. A calculation guideline for optimum bootstrap capacitor sizing is given. The circuit was manufactured in a 180nm high-voltage BiCMOS technology as part of a high-voltage gate driver. Measurements confirm the benefit of high-voltage charge storing. The fully integrated bootstrap circuit including two stacked 75.8pF and 18.9pF capacitors results in a voltage dip lower than 1V. This matches well with the theory of the calculation guideline.
Keywords :
BiCMOS integrated circuits; MOSFET circuits; bootstrap circuits; driver circuits; area efficient bootstrap circuit; area efficient gate drivers; capacitance 18.9 pF; capacitance 75.8 pF; discrete components; fully integrated bootstrap circuit; gate driver circuit; gate overdrive voltage; high charge allocation; high side driver; high voltage swing; high-side NMOS transistor; high-voltage BiCMOS technology; high-voltage charge storing; high-voltage gate driver; optimum bootstrap capacitor sizing; power management systems; second bootstrap capacitor; size 180 nm; voltage dip; Capacitance; Capacitors; Guidelines; Logic gates; MOSFET; Voltage fluctuations; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
Conference_Location :
Venice Lido
ISSN :
1930-8833
Print_ISBN :
978-1-4799-5694-4
Type :
conf
DOI :
10.1109/ESSCIRC.2014.6942046
Filename :
6942046
Link To Document :
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