DocumentCode
1373309
Title
Carry-save multiplication schemes without final addition
Author
Ciminiera, Luigi ; Montuschi, Paolo
Author_Institution
Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
Volume
45
Issue
9
fYear
1996
fDate
9/1/1996 12:00:00 AM
Firstpage
1050
Lastpage
1055
Abstract
Carry-save multipliers require an adder at the last step to convert the carry-sum representation of the most significant half of the result into a non-redundant form. This paper presents n×n multiplication schemes where this conversion is performed with a circuit operating in parallel with the carry-save array. The most relevant feature of the proposed multipliers is that the full 2n-bit result is produced, unlike similar multiplication schemes presented in the literature
Keywords
adders; carry logic; multiplying circuits; redundant number systems; adder; carry-save array; carry-save multiplication schemes; carry-sum representation; multipliers; Adders; Algorithm design and analysis; Concurrent computing; Counting circuits; Delay; Digital arithmetic; Electronic mail;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.537128
Filename
537128
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