DocumentCode :
1373326
Title :
2-1 addition and related arithmetic operations with threshold logic
Author :
Vassilladis, S. ; Cotofana, Sorin ; Bertels, Koen
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Volume :
45
Issue :
9
fYear :
1996
Firstpage :
1062
Lastpage :
1067
Abstract :
In this paper we investigate the reduction of the size for small depth feed-forward linear threshold networks performing binary addition and related functions. For n bit operands we propose a depth-3 O(n/sup 2//log n) asymptotic size network for the binary addition with O polynomially bounded weights. We propose also a depth-3 addition of optimal O(n) asymptotic sits network and a depth-2 comparison of O(/spl radic/n) asymptotic size network, both with O(2/sup /spl radic/n/) asymptotic size of weight values. For existing architectural formats we show that our schemes, with equal or smaller depth networks, substantially outperform existing schemes in terms of size and fan-in requirements and on occasions in weight requirements.
Keywords :
adders; digital arithmetic; threshold logic; 2-1 addition; arithmetic operations; binary addition; depth-3 addition; threshold logic; Arithmetic; Computer architecture; Computer networks; Fault tolerance; Feedforward systems; Logic devices; Multiprocessor interconnection networks; Pattern matching; Polynomials; Routing;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.537130
Filename :
537130
Link To Document :
بازگشت