An on-die all-digital power supply noise analyzer with enhanced spectrum measurements

Author

Tzu-Chien Hsueh ; O´Mahony, Frank ; Mansuri, Mozhgan ; Casper, Bryan K.

Author_Institution

Intel, Hillsboro, OR, USA

fYear

2014

fDate

22-26 Sept. 2014

Firstpage

251

Lastpage

254

Abstract

This paper presents a scalable all-digital power supply noise analyzer with 20GHz sampling bandwidth and 1mV resolution implemented in 32nm CMOS. This averaging-based analyzer measures power supply noise in both the equivalent-time and frequency domain with low-resolution VCO-based samplers. For frequency-domain measurements, it uses digital random phase-noise accumulation to remove correlation between the power supply noise and sampling clocks. In addition, the equivalent-time current step response is measured on-die to characterize the frequency-domain impedance of the power delivery network.

Keywords

CMOS digital integrated circuits; integrated circuit noise; network analysers; phase noise; power supply circuits; voltage-controlled oscillators; CMOS process; averaging-based analyzer; bandwidth 20 GHz; digital random phase-noise accumulation; enhanced spectrum measurements; equivalent-time current step response; equivalent-time domain; frequency domain; frequency-domain impedance; frequency-domain measurements; low-resolution VCO-based samplers; on-die all-digital power supply noise analyzer; power delivery network; sampling clocks; voltage 1 mV; Clocks; Correlation; Delays; Frequency measurement; Noise; Noise measurement; Power measurement; autocorrelation; equivalent time; glitch free; noise measurement; power delivery; random phase accumulation;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th

Conference_Location

Venice Lido

ISSN

1930-8833

Print_ISBN

978-1-4799-5694-4

Type

conf

DOI

10.1109/ESSCIRC.2014.6942069

Filename

6942069