• DocumentCode
    1373497
  • Title

    A comparison of three rounding algorithms for IEEE floating-point multiplication

  • Author

    Even, Guy ; Seidel, Peter-Michael

  • Author_Institution
    Dept. of Electr. Eng. Syst., Tel Aviv Univ., Israel
  • Volume
    49
  • Issue
    7
  • fYear
    2000
  • fDate
    7/1/2000 12:00:00 AM
  • Firstpage
    638
  • Lastpage
    650
  • Abstract
    A new IEEE compliant floating-point rounding algorithm for computing the rounded product from a carry-save representation of the product is presented. The new rounding algorithm is compared with the rounding algorithms of Yu and Zyner (1995) and of Quach et al. (1991). For each rounding algorithm, a logical description and a block diagram is given, the correctness is proven, and the latency is analyzed. We conclude that the new rounding algorithm is the fastest rounding algorithm, provided that an injection (which depends only on the rounding mode and the sign) can be added in during the reduction of the partial products into a carry-save encoded digit string. In double precision format, the latency of the new rounding algorithm is 12 logic levels compared to 14 logic levels in the algorithm of Quach et al. and 16 logic levels in the algorithm of Yu and Zyner
  • Keywords
    IEEE standards; floating point arithmetic; roundoff errors; IEEE floating-point multiplication; correctness; floating-point rounding; latency; rounding algorithm; rounding algorithms; Algorithm design and analysis; Concurrent computing; Costs; Delay; Floating-point arithmetic; Logic; Microprocessors; Partitioning algorithms; Standards publication;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.863033
  • Filename
    863033