Title :
A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency
Author :
Biswas, Arijit ; Sinangil, Yildiz ; Chandrakasan, Anantha P.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
This paper presents a fully integrated, reconfigurable switched-capacitor based step-up DC-DC converter in a 28nm FDSOI process. Three reconfigurable step-up conversion ratios (5/2, 2/1, 3/2) have been implemented which can provide a wide range of output voltage from 1.2V to 2.4V with a nominal input voltage of 1V. We propose a topology for the 5/2 mode which improves the efficiency by reducing the bottom-plate parasitic loss compared to a conventional series-parallel topology, while delivering the same amount of output power. Further, the proposed topology benefits from using core 1V devices for all charge-transfer switches without incurring any voltage overstress. The converter can deliver load current in the range of 10 μA to 500 μA, achieving a peak efficiency of 88%, using only on-chip MOS and MOM capacitors for a high density implementation.
Keywords :
DC-DC power convertors; MOS capacitors; switched capacitor networks; FDSOI integrated reconfigurable switched-capacitor; FDSOI process; MOM capacitors; bottom-plate parasitic loss; charge-transfer switches; conventional series-parallel topology; current 10 muA to 500 muA; on-chip MOS; peak efficiency; reconfigurable step-up conversion ratios; step-up DC-DC converter; voltage 1 V; voltage 1.2 V to 2.4 V; Capacitors; DC-DC power converters; Logic gates; Switches; System-on-chip; Topology; Transistors;
Conference_Titel :
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
Conference_Location :
Venice Lido
Print_ISBN :
978-1-4799-5694-4
DOI :
10.1109/ESSCIRC.2014.6942074
