Title :
A Class-D CMOS DCO with an on-chip LDO
Author :
Fanori, Luca ; Mattsson, Thomas ; Andreani, Pietro
Author_Institution :
Lund Univ., Lund, Sweden
Abstract :
This paper presents the co-design of a class-D digitally-controlled oscillator (DCO) and a low-dropout voltage regulator (LDO) generating the supply voltage for the DCO. Despite the high intrinsic supply pushing of the class-D oscillator topology, the LDO noise has only a very marginal impact on the DCO phase noise. The class-D DCO and LDO have been integrated in a 65 nm CMOS process without any thick top metal layer. The oscillation frequency is tunable between 3.0 GHz and 4.3 GHz, for a tuning range of 36%, with a fine frequency step below 3kHz and a fine frequency range of 10 MHz (both measured at 3GHz). Drawing 9.0 mA from 0.4V (corresponding to an unregulated supply voltage of 0.6 V), the phase noise is -145.5 dBc/Hz at a 10 MHz offset from a 3.0GHz carrier. The resulting FoM is 189.5 dBc/Hz, and varies less than 1dB across the tuning range. The FoM increases to above 190 dBc/Hz when the regulated supply voltage is 0.5 V.
Keywords :
CMOS digital integrated circuits; MMIC oscillators; field effect MMIC; phase noise; voltage regulators; CMOS process; DCO phase noise; class-D CMOS DCO; class-D digitally-controlled oscillator; class-D oscillator topology; current 9.0 mA; frequency 3.0 GHz to 4.3 GHz; low-dropout voltage regulator; on-chip LDO noise; oscillation frequency; size 65 nm; supply voltage; voltage 0.4 V; voltage 0.5 V; voltage 0.6 V; CMOS integrated circuits; Frequency measurement; Phase noise; Tuning; Voltage-controlled oscillators; CMOS; DCO; LDO; VCO; class-D; high efficiency; low phase noise; low-voltage; voltage regulator;
Conference_Titel :
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
Conference_Location :
Venice Lido
Print_ISBN :
978-1-4799-5694-4
DOI :
10.1109/ESSCIRC.2014.6942090