DocumentCode :
1373838
Title :
Optimization of implant anneals to improve transistor performance in a 0.15 μm CMOS technology
Author :
Lutze, J. ; Miranda, T. ; Scott, G. ; Olsen, C. ; Variam, N. ; Mehta, S.
Author_Institution :
Philips Semicond., San Jose, CA, USA
Volume :
21
Issue :
9
fYear :
2000
Firstpage :
451
Lastpage :
453
Abstract :
The impact of including a rapid thermal anneal step after the extension implants is examined for a 0.15 μm CMOS process. SIMS data will verify that shallower junctions can be obtained with only a single anneal cycle after the source-drain implants, implying that transient enhanced diffusion is minimal for this technology. Further, transistor data indicates that improved CMOS device performance can be obtained without the extension anneal cycle.
Keywords :
CMOS integrated circuits; Integrated circuit technology; Ion implantation; MOSFET; Rapid thermal annealing; Secondary ion mass spectra; 0.15 /spl mu/m CMOS technology; 0.15 mum; CMOS device performance; NMOS transistors; SIMS data; extension implants; implant anneal optimization; rapid thermal anneal step; shallower junctions; single anneal cycle; source-drain implants; transient enhanced diffusion minimization; transistor performance; CMOS process; CMOS technology; Cobalt; Dielectric devices; Fabrication; Implants; Isolation technology; MOS devices; Rapid thermal annealing; Rapid thermal processing;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.863108
Filename :
863108
Link To Document :
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