DocumentCode :
137386
Title :
A 250mV 77dB DR 10kHz BW SC ΔΣ Modulator Exploiting Subthreshold OTAs
Author :
Zhiliang Qiao ; Xiong Zhou ; Qiang Li
Author_Institution :
Integrated Syst. Lab., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear :
2014
fDate :
22-26 Sept. 2014
Firstpage :
419
Lastpage :
422
Abstract :
This paper presents a high-resolution ΔΣ modulator which is capable of operation under supply voltage as low as 250mV. A novel subthreshold inverter-based OTA is proposed and exploited in the switched-capacitor (SC) integrators, permitting a satisfied noise-shaping performance in the 4th-order feed-forward topology. With each stage´s coefficient optimized, the integrators´ internal swings and the distortion power stemming from OTAs´ gain nonlinearity are minimized. Implemented in a 0.13μm CMOS with an OSR of 64 and a sampling frequency (fs) of 1.28MHz, this design achieves a measured DR of 77.0dB, SNDR of 73.3dB, and SFDR of 85.0dB over a 10kHz bandwidth. To the best of authors´ knowledge, it appears to be the converter with highest SNDR observed among sub -0.5V designs.
Keywords :
CMOS digital integrated circuits; delta-sigma modulation; feedforward; logic gates; operational amplifiers; switched capacitor networks; 4th-order feedforward topology; OTA gain nonlinearity; SC ΔΣ modulator; SC integrator; SNDR; bandwidth 10 kHz; distortion power; high-resolution ΔΣ modulator; integrator internal swings; noise-shaping performance; size 0.13 mum; subthreshold inverter-based OTA; switched-capacitor integrators; voltage 250 mV; Bandwidth; Feedforward neural networks; Frequency measurement; Inverters; Modulation; Switches; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
Conference_Location :
Venice Lido
ISSN :
1930-8833
Print_ISBN :
978-1-4799-5694-4
Type :
conf
DOI :
10.1109/ESSCIRC.2014.6942111
Filename :
6942111
Link To Document :
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