• DocumentCode
    1374162
  • Title

    Stability-based algorithms for high-level synthesis of digital ASICs

  • Author

    Nourani, M. ; Papachristou, C.

  • Author_Institution
    Dept. of Electr. Eng., Texas Univ., Dallas, TX, USA
  • Volume
    8
  • Issue
    4
  • fYear
    2000
  • Firstpage
    431
  • Lastpage
    435
  • Abstract
    This paper presents new algorithms for the scheduling and allocation phases in high-level synthesis under time and resource constraints. This is achieved by formulating these problems in terms of Liapunov´s stability theorem using a transformation technique between the design space and the dynamic system space. These algorithms are based on moves in the design space, which correspond to the moves toward the equilibrium point in the dynamic system space. The scheduling algorithm (MFS) takes care of mutually exclusive operations, loop folding, multicycle operations, chained operations, and pipelining (structural and functional). The mixed scheduling-allocation algorithm (MFSA) can handle all of the above scheduling applications as well as simultaneously performing allocation of functional units, registers, and interconnects while minimizing the overall cost.
  • Keywords
    Lyapunov methods; application specific integrated circuits; circuit CAD; circuit stability; digital integrated circuits; high level synthesis; integrated circuit design; scheduling; Lyapunov stability theorem; allocation phase; chained operations; cost minimisation; design space; digital ASICs; dynamic system space; equilibrium point; functional units; high-level synthesis; interconnects; loop folding; mixed scheduling-allocation algorithm; multicycle operations; mutually exclusive operations; pipelining; registers; resource constraints; scheduling algorithm; scheduling phase; stability-based algorithms; time constraints; transformation technique; Application specific integrated circuits; Clustering algorithms; Hardware; High level synthesis; Parallel processing; Pipeline processing; Processor scheduling; Registers; Scheduling algorithm; Stability;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/92.863623
  • Filename
    863623