• DocumentCode
    1376783
  • Title

    Achieving high performance in bus-based shared-memory multiprocessors

  • Author

    Milenkovic, Aleksandar

  • Author_Institution
    Belgrade Univ., Serbia
  • Volume
    8
  • Issue
    3
  • fYear
    2000
  • Firstpage
    36
  • Lastpage
    44
  • Abstract
    In bus-based shared-memory multiprocessors, several techniques reduce cache misses and bus traffic, which are the key obstacles to high performance
  • Keywords
    cache storage; performance evaluation; shared memory systems; system buses; telecommunication traffic; bus traffic; bus-based shared-memory multiprocessors; cache misses; performance; Adaptive control; Broadcasting; Buffer storage; Delay; Hardware; Parallel machines; Prefetching; Programmable control; Protocols; Traffic control;
  • fLanguage
    English
  • Journal_Title
    Concurrency, IEEE
  • Publisher
    ieee
  • ISSN
    1092-3063
  • Type

    jour

  • DOI
    10.1109/4434.865891
  • Filename
    865891
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1376783