Title :
Achieving high performance in bus-based shared-memory multiprocessors
Author :
Milenkovic, Aleksandar
Author_Institution :
Belgrade Univ., Serbia
Abstract :
In bus-based shared-memory multiprocessors, several techniques reduce cache misses and bus traffic, which are the key obstacles to high performance
Keywords :
cache storage; performance evaluation; shared memory systems; system buses; telecommunication traffic; bus traffic; bus-based shared-memory multiprocessors; cache misses; performance; Adaptive control; Broadcasting; Buffer storage; Delay; Hardware; Parallel machines; Prefetching; Programmable control; Protocols; Traffic control;
Journal_Title :
Concurrency, IEEE
DOI :
10.1109/4434.865891
