DocumentCode
1377292
Title
2D DWT VLSI architecture for wavelet image processing
Author
Seung-Kwon Pack ; Kim, Lee-Sup
Author_Institution
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
Volume
34
Issue
6
fYear
1998
fDate
3/19/1998 12:00:00 AM
Firstpage
537
Lastpage
538
Abstract
A cost-effective VLSI architecture with separate data-paths and their corresponding filter structure is proposed for performing a two-dimensional discrete wavelet transform (2D DWT). Compared with the conventional 2D DWT VLSI architectures, the proposed semi-recursive 2D DWT VLSI architecture has minimum hardware cost, and optimised data-bus utilisation, scheduling control overhead and storage size
Keywords
VLSI; image processing; two-dimensional digital filters; wavelet transforms; data bus; data path; filter; hardware cost; scheduling control; semi-recursive 2D DWT VLSI architecture; two-dimensional discrete wavelet transform; wavelet image processing;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19980387
Filename
674271
Link To Document