Title :
An automatic controller extractor for HDL descriptions at the RTL
Author :
Liu, Chien-Nan Jimmy ; Jou, Jing-Yang
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The controller extraction algorithm uses an approach that frees it from restrictions on HDL code writing style
Keywords :
finite state machines; logic CAD; HDL descriptions; RTL; controller extraction; finite-state machines; functional verification; Automatic control; Clocks; Data mining; Filtering; Hardware design languages; Signal processing; Size control; State-space methods; Testing; Writing;
Journal_Title :
Design & Test of Computers, IEEE
