• DocumentCode
    1379796
  • Title

    Salvaging test windows in BIST diagnostics

  • Author

    Savir, Jacob

  • Author_Institution
    Dept. of Electr. & Comput. Eng., New Jersey Inst. of Technol., Newark, NJ, USA
  • Volume
    47
  • Issue
    4
  • fYear
    1998
  • fDate
    4/1/1998 12:00:00 AM
  • Firstpage
    486
  • Lastpage
    491
  • Abstract
    This paper uses the STUMPS architecture to study the properties of a new diagnostic procedure. According to the old procedure, the process stops at the end of each test window to compare the measured signature against its precomputed value. The old procedure also calls for the abandonment of all future test windows after the first failing one is encountered. This is due to the unavailability of expected future test window signatures in the presence of a previously captured error. This paper shows a simple method of salvaging future test windows by adjusting their expected signatures to fit past observed errors. Experiments conducted using this new procedure reveal an improvement of at least one order of magnitude in diagnostic resolution over what has been previously experienced
  • Keywords
    built-in self test; logic testing; BIST diagnostics; STUMPS architecture; diagnostic procedure; logic testing; test window; Built-in self-test; Clocks; Design methodology; Error analysis; Failure analysis; Jacobian matrices; Logic testing; Multichip modules; Remotely operated vehicles; Sequential analysis;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.675718
  • Filename
    675718