Title :
Matrix synthesis of high-speed logic
Author_Institution :
Westinghouse Electric Corporation, Baltimore, Md.; Burroughs Corporation Research Center, Paoli, Pa.
fDate :
3/1/1959 12:00:00 AM
Abstract :
The object of this paper is to describe a method for synthesizing function matrices from logical conditions and for detecting redundancy prior to designing the network. Accordingly the paper discusses the following: 1. the definition of function matrices and logical operations; 2. the expansion of logical functions in view of additional logical conditions imposed by another variable; and 3. minimization routines.
Keywords :
Equations; Indexes; Logic gates; Matrices; Minimization; Radio frequency; Redundancy;
Journal_Title :
American Institute of Electrical Engineers, Part I: Communication and Electronics, Transactions of the
DOI :
10.1109/TCE.1959.6372946
