DocumentCode :
1381035
Title :
1200 V fully implanted JI technology
Author :
Hardikar, S. ; Xu, Y.Z. ; De Souza, M.M. ; Narayanan, E. M Sankara
Author_Institution :
Emerging Technol. Res. Centre, De Monfort Univ., Leicester, UK
Volume :
36
Issue :
18
fYear :
2000
fDate :
8/31/2000 12:00:00 AM
Firstpage :
1587
Lastpage :
1589
Abstract :
A novel 1200 V fully implanted junction isolation technology for high voltage integrated circuits (HVICs) is proposed. This technique employs the variation in lateral doping (VLD) technique to achieve change in the thickness as well as the concentration of the drift region in a lateral power device to enable effective distribution of the electric field and low on-state resistance. Detailed 2D numerical simulations clearly validate this new approach and show enhancement performance of a lateral MOSFET in comparison to a device with a uniformly doped drift region
Keywords :
CMOS integrated circuits; doping profiles; ion implantation; isolation technology; power MOSFET; power integrated circuits; semiconductor device breakdown; 1200 V; 2D numerical simulations; HV integrated circuits; HVIC; RESURF technique; doped drift region; electric field distribution; fully implanted JI technology; high voltage ICs; junction isolation technology; lateral MOSFET; lateral power device; low on-state resistance; modified HV-CMOS process; performance enhancement; variation in lateral doping technique;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20001102
Filename :
868130
Link To Document :
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