DocumentCode :
1382679
Title :
The equivalence of twos-complement addition and the conversion of redundant-binary to twos-complement numbers
Author :
Blair, Gerard M
Author_Institution :
Dept. of Electr. Eng., Edinburgh Univ., UK
Volume :
45
Issue :
6
fYear :
1998
fDate :
6/1/1998 12:00:00 AM
Firstpage :
669
Lastpage :
671
Abstract :
The equivalence between redundant-binary (RB) to twos-complement number conversion and twos-complement addition is shown using a simple transform between the two number domains. As a consequence, all hardware architectures designed for either operation may be easily adapted to implement the other
Keywords :
digital arithmetic; logic design; redundant number systems; equivalence; hardware architecture adaption; redundant-binary to twos-complement number conversion; twos-complement addition; Adders; Digital arithmetic; Encoding; Equations; Hardware; Logic circuits; Logic design; Pulse inverters; Transforms;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7122
Type :
jour
DOI :
10.1109/81.678487
Filename :
678487
Link To Document :
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