Title :
Logic design and implementation in a pumped tunnel diode-transistor logic system
Author :
Akers, S. B. ; Stabler, E. P.
Author_Institution :
General Electric Company, Syracuse, N. Y.
fDate :
5/1/1963 12:00:00 AM
Abstract :
The logic design technique and the method of implementing logic design with a 200-mc (megacycle) logic module are described. The logic design technique results in a design which conforms to the constraints on fan-in, fan-out, and timing which are required for satisfactory module operation. The implementation method takes account of the transmission time delay between modules. The design and construction constraints required for this system are typical for a wide variety of high-speed logic systems.
Keywords :
Adders; Delay; Delay effects; Impedance; Inverters; Logic design; Logic gates;
Journal_Title :
American Institute of Electrical Engineers, Part I: Communication and Electronics, Transactions of the
DOI :
10.1109/TCE.1963.6373390