A BJT-Based Heterostructure 1T-DRAM for Low-Voltage Operation

We propose a BJT-based floating-body 1T-DRAM cell made of a novel heterostructure suitable to low-power DRAM technology. Based on the numerical simulation, we verify that the proposed structure is capable of reducing the breakdown voltage and single-transistor latch bias in the BJT-based 1T-DRAM, which largely depends on the impact ionization and parasitic BJT through enhancement of the current gain (β). Moreover, it is discerned that the novel structure with the SiGe structure has advantages of dynamic refresh characteristics due to reduced bit-line disturb compared with the normal Si device.