DocumentCode
138543
Title
Output decisions for stochastic LDPC decoders
Author
Kuo-Lun Huang ; Gaudet, Vincent ; Salehi, Marzieh
Author_Institution
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fYear
2014
fDate
19-21 March 2014
Firstpage
1
Lastpage
5
Abstract
Stochastic decoding is a method to iteratively decode error-correcting codes such as low-density parity-check codes. Due to the computational simplicity of its decoding algorithm, stochastic decoding provides not only low silicon area but also competitive performance. In this paper, we research the different techniques used to determine the code bits generated by stochastic decoders during the final decision process. We investigate an efficient method where code bits are directly decided based on the final stochastic bits generated at output nodes. This observation contributes to saving chip area and providing high throughput for stochastic decoders.
Keywords
error correction codes; iterative decoding; parity check codes; stochastic processes; computational simplicity; decoding algorithm; final decision process; iteratively decode error correcting codes; low density parity check codes; output decisions; stochastic LDPC decoders; Decoding; Europe; Iterative decoding; Lead; Logic gates; Radio access networks; Low-Density Parity-Check (LDPC) codes; Stochastic decoding; quantization in statistics; stochastic computation;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Sciences and Systems (CISS), 2014 48th Annual Conference on
Conference_Location
Princeton, NJ
Type
conf
DOI
10.1109/CISS.2014.6814072
Filename
6814072
Link To Document