Large-scale atomistic modeling of nanoelectronic structures

Author

Nakano, Aiichiro ; Bachlechner, Martina E. ; Branicio, Paulo ; Campbell, Timothy J. ; Ebbsjö, Ingvar ; Kalia, Rajiv K. ; Madhukar, Anupam ; Ogata, Shuji ; Omeltchenko, Andrey ; Rino, José P. ; Shimojo, Fuyuki ; Walsh, Phillip ; Vashishta, Priya

Author_Institution

Dept. of Phys. & Astron., Louisiana State Univ., Baton Rouge, LA, USA

Volume

47

Issue

10

fYear

2000

fDate

10/1/2000 12:00:00 AM

Firstpage

1804

Lastpage

1810

Abstract

Large-scale molecular-dynamics simulations are performed on parallel computers to study critical issues on ultrathin dielectric films and device reliability in next-decade semiconductor devices. New interatomic-potential models based on many-body, reactive, and quantum-mechanical schemes are used to study various atomic-scale effects: growth of oxide layers; dielectric properties of high-permittivity oxides; dislocation activities at semiconductor/dielectric interfaces; effects of amorphous layers and pixellation on atomic-level stresses in lattice-mismatched nanopixels; and nanoindentation testing of thin films. Enabling technologies for 10 to 100 million-atom simulations of nanoelectronic structures are discussed, which include multiresolution algorithms for molecular dynamics, load balancing, and data management. In ten years, this scalable software infrastructure will enable trillion-atom simulations of realistic device structures with sizes well beyond μm on petaflop computers

Keywords

crystal defects; dielectric thin films; indentation; molecular dynamics method; nanotechnology; semiconductor device models; atomic-scale effects; device reliability; dislocation activities; high-permittivity oxides; interatomic-potential models; large-scale atomistic modeling; lattice-mismatched nanopixels; load balancing; molecular-dynamics simulations; multiresolution algorithms; nanoelectronic structures; nanoindentation testing; next-decade semiconductor devices; oxide layers; pixellation; quantum-mechanical schemes; scalable software infrastructure; semiconductor/dielectric interfaces; ultrathin dielectric films; Atomic layer deposition; Computational modeling; Computer simulation; Concurrent computing; Dielectric films; Dielectric thin films; Large-scale systems; Nanostructures; Semiconductor device reliability; Semiconductor devices;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.870551

Filename

870551