DocumentCode :
1385756
Title :
Memory cell simulation on the nanometer scale
Author :
Müller, Heinz-Olaf ; Mizuta, Hiroshi
Author_Institution :
Cavendish Lab., Cambridge Univ., UK
Volume :
47
Issue :
10
fYear :
2000
fDate :
10/1/2000 12:00:00 AM
Firstpage :
1826
Lastpage :
1830
Abstract :
We describe a toolset of simulation programs and its use for the simulation of a memory cell based on Coulomb blockade. We present simulation results both for the main parameters of the memory cell and the influence of parasitic effects. We point out that both setting up specific programs and providing data exchange between them is necessary in order to describe the memory cell to a realistic extent
Keywords :
Coulomb blockade; cellular arrays; circuit simulation; field effect memory circuits; integrated circuit modelling; integrated memory circuits; memory architecture; Coulomb blockade; FET memory ICs; data exchange; memory architecture; memory cells; nanometer scale; parasitic effects; simulation programs; Circuit simulation; Fabrication; Helium; Integrated circuit interconnections; MOSFETs; Memory architecture; Packaging; Silicon on insulator technology; Single electron memory; Tunneling;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.870555
Filename :
870555
Link To Document :
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