DocumentCode :
1386426
Title :
Process Development and Reliability of Microbumps
Author :
Lim, Sharon Pei-Siang ; Rao, Vempati Srinivasa ; Hnin, Wai Yin ; Ching, Wai Leong ; Kripesh, Vaidyanathan ; Lee, Charles ; Lau, John ; Milla, Juan ; Fenner, Andy
Author_Institution :
Inst. of Microelectron. (IME), Singapore, Singapore
Volume :
33
Issue :
4
fYear :
2010
Firstpage :
747
Lastpage :
753
Abstract :
The use of flip-chip bonding technology on gold-tin (AuSn) microbumps for flip-chip packaging is becoming increasingly important in the electronics industry. Some of the main advantages of AuSn system over solder flip-chip technology are suitability for very fine pitch interconnection and fluxless bonding. Fluxless flip-chip assembly is in demand especially for medical applications and optoelectonics packaging. Here, we report the assembly process development of a silicon stacked module assembled with AuSn microbumps to meet the stringent reliability. The effects of bond pressure distribution, bond temperature and alignment accuracy were found to be critical in this stacked silicon using AuSn microbumps. A three-factor design of experiment was carried out to investigate the effects of assembly parameters such as bonding pressure, temperature and time on contact resistance and AuSn solder wetting on the electroless nickel and gold under bump metallization. Results showed that higher bond force is undesirable and contributes to passivation cracking and deformed AuSn joint with AuSn solder being squeezed out of the joint during bonding. The reliability result of the flip-chip assembly of stacked silicon module using AuSn microbumps was presented.
Keywords :
assembling; fine-pitch technology; flip-chip devices; gold alloys; metallisation; reliability; tin alloys; AuSn; assembly process development; bond pressure distribution effect; bond temperature; bump metallization; contact resistance; electroless nickel; electronics industry; flip-chip bonding technology; flip-chip packaging; fluxless bonding; fluxless flip-chip assembly; microbump reliability; optoelectonics packaging; passivation cracking; silicon stacked module; solder flip-chip technology; very fine pitch interconnection; Assembly; Bonding; Flip chip; Flip chip solder joints; Gold alloys; Reliability; Semiconductor device manufacture; AuSn solder; microbumps; solder joint reliability;
fLanguage :
English
Journal_Title :
Components and Packaging Technologies, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3331
Type :
jour
DOI :
10.1109/TCAPT.2010.2046487
Filename :
5643124
Link To Document :
بازگشت