A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order /spl Delta//spl Sigma/ modulator

Author

Rhee, Woogeun ; Song, Bang-Sup ; Ali, Akbar

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA

Volume

35

Issue

10

fYear

2000

Firstpage

1453

Lastpage

1460

Abstract

A 1.1-GHz fractional-N frequency synthesizer is implemented in 0.5-/spl mu/m CMOS employing a 3-b third-order /spl Delta//spl Sigma/ modulator. The in-band phase noise of -92 dBc/Hz at 10-kHz offset with a spur of less than -95 dBc is measured at 900.03 MHz with a phase detector frequency of 7.994 MHz and a loop bandwidth of 40 kHz. Having less than 1-Hz frequency resolution and agile switching speed, the proposed system meets the requirements of most RF applications including multislot GSM, AMPS, IS-95, and PDC.

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; cellular radio; frequency synthesizers; phase detectors; phase locked loops; phase noise; sigma-delta modulation; 0.5 micron; 1.1 GHz; 3 bit; 40 kHz; 7.994 MHz; 900.03 MHz; AMPS; CMOS; PDC; agile switching speed; fractional-N frequency synthesizer; frequency resolution; in-band phase noise; loop bandwidth; multislot GSM; phase detector frequency; third-order sigma-delta modulator; Bandwidth; Delta modulation; Frequency measurement; Frequency synthesizers; Noise measurement; Phase detection; Phase frequency detector; Phase measurement; Phase noise; Radio frequency;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.871322

Filename

871322