• DocumentCode
    1387502
  • Title

    Addition to "Evaluation of three 32-bit CMOS" adders in DCVS logic for self-timed circuits"

  • Author

    Ruiz, G.A.

  • Author_Institution
    Universidad de Cantabria
  • Volume
    35
  • Issue
    10
  • fYear
    2000
  • Firstpage
    1517
  • Lastpage
    1517
  • Abstract
    Two prior publications are reported that should have been referenced in the above-named article (ibid., vol. 33, no. 4, pp. 604??613, Apr. 1998). One from 1955 the other from 1979. The author notes he was not aware of any previous publications that define the complementary carry signal, Ni.
  • Keywords
    Adders; CMOS logic circuits; Digital arithmetic; Logic circuits; Solid state circuits;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2000.871333
  • Filename
    871333
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1387502