New path history management circuits for Viterbi decoders

Up until now the trace back technique and the register-exchange approaches are two major techniques used for the path history management in the chip designs of Viterbi decoders. The former takes up less area but requires much more time than the latter, since it needs to search the trace of the survivor path back sequentially. We propose an alternate approach that is based on the concept of a permutation network and implements directly the trellis diagram of a given convolutional code. Instead of using registers to store the survivor path data, all information is recorded in a permutation network, and the resulting circuit has a smaller routing area than the register-exchange technique and has faster decoding speed than the trace-back method regardless of the constraint length. In addition, it is more straightforward to realize the permutation networks path history unit than the trace-forward unit.