A novel hierarchical-search block matching algorithm and VLSI architecture considering the spatial complexity of the macroblock

We propose a novel hierarchical-search block matching algorithm for motion estimation, which adaptively selects an initial search level based on the spatial complexity of a matching block. It relies on a simple computation of the pixel intensity variation in the current macroblock. We demonstrate its effectiveness in two aspects: the performance and the computational cost. A hardware architecture and a VLSI realization of this algorithm with half-pel motion estimation and motion compensation are also presented. The proposed algorithm greatly reduces the computations required in the existing hierarchical-search block matching algorithms while achieves virtually identical performance to them