A flexible compatible PCI interface for nuclear experiments

In this paper a PCI Initiator/Target Interface is introduced, where a single chip design (XILINX XC4010E) is used to implement a PCI Local Bus Interface, revision 2.1, protocol and timing compliance. The flexible design can be easily adapted for specific interface requirements. This interface card was used for some physical applications, reading data from 2-dimensional scintillation detectors, and different types of ADCs. It was tested with data sampling rates of up to 0.7 MS/s. The collected data can be compared with look up table contents controlling acceptance or rejection of data. The I/O space registers are used for control signals, Run, Stop, Read Status, and Write the memory base address in the Target Mode. The Initiator Mode is used to read and write data from and to the memory. The design configuration is loaded into the XILINX chip from an EPROM in a master parallel mode. The EPROM is reloaded by the XILINX chip through the read and write Target commands of the PCI memory space. More than 40% of the chip area is available for the application logic