Performance Enhancement of Silicon Nanowire Memory by Tunnel Oxynitride, Stacked Charge Trap Layer, and Mechanical Strain

Author

Huang, C.J. ; Yang, C.H. ; Hsueh, C.Y. ; Lee, J.H. ; Chang, Y.T. ; Lee, S.C.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

33

Issue

1

fYear

2012

Firstpage

20

Lastpage

22

Abstract

Heavily doped silicon nanowires (SiNWs) are adopted to fabricate a memory device composed of an AlON tunnel layer and a HfO₂/HfAlO charge trap bilayer, which exhibits a large memory window of 4.6 V when operated in the program/erase phases, i.e., +12 V for 100 μs and -12 V for 10 ms, along with excellent 70% extrapolated ten-year data retention and good endurance up to 10⁵ cycles. Strain effects on SiNW memory characteristics have also been investigated. It is demonstrated that the tensile strain increases the program window and the compressive strain improves the data retention. The underlying mechanism is attributed to the incorporation of nitrogen in the AlON tunnel layer.

Keywords

aluminium compounds; elemental semiconductors; hafnium compounds; heavily doped semiconductors; internal stresses; nanowires; random-access storage; silicon; HfO₂-HfAlO-AlON-Si; charge trap bilayer; compressive strain; data retention; heavily doped silicon nanowires; large memory window; mechanical strain; memory device; nitrogen incorporation; performance enhancement; program window; silicon nanowire memory; stacked charge trap layer; tensile strain; time 10 ms; time 100 mus; tunnel oxynitride; voltage -12 V; voltage 12 V; voltage 4.6 V; Aluminum oxide; Electron devices; Electron traps; Hafnium compounds; Logic gates; Silicon; Strain; Aluminum oxynitride; nonvolatile memory; stacked charge trap layer;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2011.2173789

Filename

6096361