Title :
Efficient VLSI implementation of statistical carry lookahead adder
Author :
Corsonello, P. ; Perri, S. ; Cocorullo, G.
Author_Institution :
Dept. of Electron. Eng. & Appl. Math., Calabria Univ., Italy
fDate :
4/30/1998 12:00:00 AM
Abstract :
A new efficient VLSI implementation of a statistical carry lookahead adder is presented. The new circuit does not require precharged input signals, and it can be used in practical asynchronous system design and in mixed logic design without any auxiliary circuitry. The circuit is realised in domino logic, and DCVSL gates are used for the critical path
Keywords :
VLSI; adders; asynchronous circuits; integrated logic circuits; DCVSL gate; VLSI circuit; asynchronous system design; domino logic; mixed logic design; statistical carry lookahead adder;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19980609
