DocumentCode :
1391458
Title :
Gate-controlled double electron layer tunnelling transistor and single transistor digital logic applications
Author :
Moon, J.S. ; Simmons, J.A. ; Reno, John L. ; Hafich, M.J.
Author_Institution :
Sandia Nat. Labs., Albuquerque, NM
Volume :
34
Issue :
9
fYear :
1998
fDate :
4/30/1998 12:00:00 AM
Firstpage :
921
Lastpage :
922
Abstract :
A novel entirely planar quantum transistor based on tunnelling between two separate electron layers in an AlGaAs/GaAs double quantum well heterostructure is demonstrated. Using the tunability of the tunnelling I-V characteristics, digital logic such as XOR and NAND are demonstrated using a single double electron layer tunnelling transistor
Keywords :
III-V semiconductors; aluminium compounds; gallium arsenide; logic gates; resonant tunnelling transistors; semiconductor quantum wells; AlGaAs-GaAs; AlGaAs/GaAs double quantum well heterostructure; I-V characteristics; NAND gate; XOR gate; digital logic; double electron layer tunnelling transistor; planar quantum transistor;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19980650
Filename :
682861
Link To Document :
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