DocumentCode :
1392736
Title :
MUTABOR, a coprocessor supporting memory management in an object-oriented architecture
Author :
Kaiser, Jorg
Author_Institution :
Gesellschaft fur Math. & Datenverarbeitung, St. Augustin, West Germany
Volume :
8
Issue :
5
fYear :
1988
Firstpage :
30
Lastpage :
46
Abstract :
The author describes MUTABOR, a micro-programmable coprocessor that works with a 68020 CPU to control and update a 4096-entry address translation cache that achieves an excellent hit rate. He defines the requirements for an object-oriented memory-management unit, and outlines the architecture of MUTABOR and the object-addressing mechanism. He also discusses the design decisions concerning the address translation cache, which were based on simulation results.<>
Keywords :
memory architecture; storage management; 68020 CPU; MUTABOR; address translation cache; coprocessor; design decisions; memory management; microprogrammable coprocessor; object-oriented architecture; Access control; Computer architecture; Coprocessors; Fault tolerant systems; Hardware; Memory management; Operating systems; Permission; Protection; Resource management;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.87524
Filename :
87524
Link To Document :
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