Title :
Test generation within an expert system environment
Author :
Cosgrove, S.J. ; Musgrave, G.
Author_Institution :
Electron. Res. Lab., DS&T Organ., Salisbury, SA, Australia
fDate :
1/1/1991 12:00:00 AM
Abstract :
Gate-level test pattern generation (TPG) techniques are inadequate when considering the complexity and variety of today´s circuits. Hence, more abstract approaches must be developed so that TPG efficiency can be increased and the inherent bottleneck between test planning and TPG reduced. As an expert system attempts to model human reasoning, functional TPG approaches must be used within such an environment as opposed to algorithmic gate-level methods which are beyond the capability of human understanding, memory and reasoning, whereas functional approaches map directly to the human thought process. The paper discusses how such a test generation approach can be used within an expert system, furthermore a number of heuristics are described to show how TPG can be simplified within such an environment.
Keywords :
combinatorial circuits; electronic engineering computing; expert systems; logic testing; expert system environment; gate level test pattern generation; heuristics; human reasoning; random combinatorial logic; test planning;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E