DocumentCode :
1393185
Title :
Cycle-slipping probability of first-order phase-locked loop using transient analysis
Author :
Brunt, S.M. ; Darnell, M. ; Grayson, M.
Author_Institution :
Leeds Univ., UK
Volume :
144
Issue :
5
fYear :
1997
fDate :
10/1/1997 12:00:00 AM
Firstpage :
357
Lastpage :
360
Abstract :
The first-order phase-locked loop is a standard feedback device commonly used to provide both carrier and clock synchronisation in digital transmission systems. At low signal-to-noise ratios increased jitter on the timing estimates results in a raised probability of symbol error and an increased likelihood of synchroniser symbol slips; in the latter case, symbols are either deleted from or inserted into the received data stream. The paper re-examines the full transient modulo-2π and nonmodulo-2π phase error process and demonstrates that the probability of cycle-slipping with time can be expressed in terms of the loop cycle-slipping frequency as determined from a previous stationary analysis of the loop
Keywords :
data communication; digital communication; feedback; jitter; phase locked loops; probability; synchronisation; transient analysis; PLL; SNR; carrier synchronisation; clock synchronisation; cycle slipping probability; data communication; digital transmission systems; feedback device; first order phase locked loop; jitter; loop cycle slipping frequency; low signal to noise ratios; modulo-2π phase error; nonmodulo-2π phase error; received data stream; stationary analysis; symbol error probability; synchroniser symbol slips; timing estimates; transient analysis;
fLanguage :
English
Journal_Title :
Communications, IEE Proceedings-
Publisher :
iet
ISSN :
1350-2425
Type :
jour
DOI :
10.1049/ip-com:19971501
Filename :
683561
Link To Document :
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