The design of an optoelectronic arithmetic processor based on permutation networks

Author

Lin, Ming-Bo ; Oruç, A. Yavuz

Author_Institution

Dept. of Electron. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan

Volume

46

Issue

2

fYear

1997

fDate

2/1/1997 12:00:00 AM

Firstpage

142

Lastpage

153

Abstract

This paper introduces a new concept by which it is possible to design and implement arithmetic processors using permutation networks. To demonstrate this concept, several optoelectronic arithmetic units combining optical directional coupler switches and cyclic permutation networks are designed. The designs show that addition, subtraction, and multiplication can all be performed in O(log n) time in residue code domain and using O(n²) directional coupler switches and gates, where n=log M, and M is the integer range of interest. These arithmetic units also have the capability of concurrent error detection and fault-tolerance, and they can be used to construct constant time inner product processors

Keywords

error detection; fault tolerant computing; optical computing; optical directional couplers; residue number systems; arithmetic units; concurrent error detection; constant time inner product processors; cyclic permutation networks; fault-tolerance; optical directional coupler switches; optoelectronic arithmetic processor; optoelectronic arithmetic units; permutation networks; residue code domain; Arithmetic; Directional couplers; Electron optics; Hardware; Integrated optics; Optical computing; Optical switches; Photonic integrated circuits; Programmable logic arrays; Programmable logic devices;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.565589

Filename

565589