• DocumentCode
    1393533
  • Title

    Complexity analysis of the cost-table approach to the design of multiple-valued logic circuits

  • Author

    Schueller, Kriss A. ; Butler, Jon T.

  • Author_Institution
    Dept. of Math. & Comput. Sci., Youngstown State Univ., OH, USA
  • Volume
    46
  • Issue
    2
  • fYear
    1997
  • fDate
    2/1/1997 12:00:00 AM
  • Firstpage
    205
  • Lastpage
    209
  • Abstract
    We analyze the computational complexity of the cost-table approach to designing multiple-valued logic circuits that is applicable to I2L, CCDs, current-mode CMOS, and RTDs. We show that this approach is NP-complete. An efficient algorithm is shown for finding the exact minimal realization of a given function by a given cost-table
  • Keywords
    computational complexity; logic design; multivalued logic circuits; CCDs; IIL; NP-complete; RTDs; complexity analysis; cost table; cost-table approach; current-mode CMOS; exact minimal realization; multiple-valued logic circuits; CMOS logic circuits; Charge coupled devices; Circuit synthesis; Computational complexity; Cost function; Logic circuits; Logic design; Logic functions; Minimization; Power dissipation;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.565599
  • Filename
    565599
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1393533