iWarp: a 100-MOPS, LIW microprocessor for multicomputers

Author

Peterson, Craig ; Sutton, James ; Wiley, Paul

Author_Institution

Intel Corp., Hillsboro, OR, USA

Volume

11

Issue

3

fYear

1991

fDate

6/1/1991 12:00:00 AM

Firstpage

26

Lastpage

29

Abstract

An architecture that efficiently supports both message-passing and systolic communications in one system is presented. This architecture incorporates a variety of innovative features unifying both computational power and communications flexibility in one VLSI component, the iWarp microprocessor. The message-based communication model is discussed, and an overview of the architecture is given. Two principle iWarp components, called the communication agent and the computation agent, and the register file they share are described. The efficiencies of word-level communication are examined. The software development environment is also described.<>

Keywords

VLSI; microprocessor chips; parallel architectures; parallel machines; LIW microprocessor; VLSI component; architecture; communication agent; computation agent; iWarp microprocessor; message-based communication model; message-passing; multicomputers; register file; software development environment; systolic communications; word-level communication; Computer applications; Computer architecture; Concurrent computing; Delay; Marine vehicles; Microprocessors; Parallel languages; Parallel processing; Routing; Very large scale integration;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/40.87568

Filename

87568